4 bit synchronous BCD counter

4bit synchronous BCD  counter: 

A BCD(binary coded decimal)counter is one of the 4-bit binary counters, which counts from 0 to a pre-determined count with an applied clock signal. When the count reaches the predetermined count value, it resets all the flip-flops and starts to count again from 0. This type of counter is designed by using 4 JK flip flops and counts from 0 to 9, and the result is represented in digital form. After reaching the count of 9 (1001), it

Verilog code:

resets and starts again

module bcd_counter(input clock, clear,

           output reg [3:0] count);

reg [3:0] t;

always @ (posedge clock) begin

  if (clear) 

  begin

    t <= 4'b0000;

    count <= 4'b0000;

  end

  else 

  begin

    t <= t + 1;

    if (t == 4'b1001) 

    begin

      t <= 4'b0000;

    end

    count <= t;

  end

end

endmodule

Test bench code:

`timescale 1ns / 1ps

module bcd_counter_tb;

        // Inputs

        reg [0:0] clock;

        reg clear;

        // Outputs

        wire [3:0] count;

        // Instantiate the Unit Under Test (UUT)

        bcd_counter uut (

                .clock(clock), 

                .count(count), 

                .clear(clear)

        );

        initial begin

                // Initialize Inputs

                clock = 0;

                clear = 1;

#25 clear=0;

#250 clear=1;

#25 clear=0;

#450 $finish;

                end

        always 

        #10 clock=~clock;

endmodule

#verilog 4bit synchronous counter