washing machine code using Verilog
module washing_machine_fsm (
input clk,
input rst_n, // Active low reset
input start,
input door_closed,
input water_level,cycle_complete,
output reg [2:0] state,
output reg motor_on,
output reg water_valve,
output reg drain_valve,
output reg buzzer
);
localparam IDLE = 3'b000;
localparam FILL_WATER = 3'b001;
localparam WASH = 3'b010;
localparam RINSE = 3'b011;
localparam SPIN = 3'b100;
localparam DRAIN_WATER = 3'b101;
localparam END = 3'b110;
localparam ERROR = 3'b111;
reg [2:0] next_state;
// State transition logic
always @(posedge clk or negedge rst_n) begin
if (!rst_n)
state <= IDLE;
else
state <= next_state;
end
// Next state logic
always @(*) begin
next_state = state;
case (state)
IDLE: begin
if (start && door_closed)
next_state = FILL_WATER;
else if (start && !door_closed)
next_state = ERROR;
end
FILL_WATER: begin
if (!door_closed)
next_state = ERROR;
else if (water_level)
next_state = WASH;
end
WASH: begin
if (!door_closed)
next_state = ERROR;
else if (cycle_complete)
next_state = RINSE;
end
RINSE: begin
if (!door_closed)
next_state = ERROR;
else if (cycle_complete)
next_state = SPIN;
end
SPIN: begin
if (!door_closed)
next_state = ERROR;
else if (cycle_complete)
next_state = DRAIN_WATER;
end
DRAIN_WATER: begin
if (!door_closed)
next_state = ERROR;
else if (cycle_complete)
next_state = END;
end
END: begin
if (!start)
next_state = IDLE;
end
ERROR: begin
if (!start)
next_state = IDLE;
end
default: next_state = IDLE;
endcase
end
// Output logic
always @(*) begin
// Default values
motor_on = 0;
water_valve = 0;
drain_valve = 0;
buzzer = 0;
case (state)
FILL_WATER: water_valve = 1;
WASH: motor_on = 1;
RINSE: motor_on = 1;
SPIN: motor_on = 1;
DRAIN_WATER: drain_valve = 1;
END: buzzer = 1;
ERROR: buzzer = 1;
endcase
end
endmodule
Washing machine code test bench file:
`timescale 1ns / 1ps
module washing_machine_fsm_tb;
reg clk;
reg rst_n;
reg start;
reg door_closed;
reg water_level;
reg cycle_complete;
wire [2:0] state;
wire motor_on;
wire water_valve;
wire drain_valve;
wire buzzer;
washing_machine_fsm DUT (
.clk(clk),
.rst_n(rst_n),
.start(start),
.door_closed(door_closed),
.water_level(water_level),
.cycle_complete(cycle_complete),
.state(state),
.motor_on(motor_on),
.water_valve(water_valve),
.drain_valve(drain_valve),
.buzzer(buzzer)
);
initial clk = 0;
always #5 clk = ~clk;
initial begin
$monitor("Time=%0d, State=%b, Motor=%b, WaterValve=%b, DrainValve=%b, Buzzer=%b",
$time, state, motor_on, water_valve, drain_valve, buzzer);
rst_n = 0; start = 0; door_closed = 0; water_level = 0; cycle_complete = 0;
#10 rst_n = 1;
// Start the machine with door closed
start = 1; door_closed = 1; #10;
// Simulate water filling
water_level = 1; #20;
// Simulate wash cycle completion
cycle_complete = 1; #10 cycle_complete = 0;
// Simulate rinse cycle completion
cycle_complete = 1; #10 cycle_complete = 0;
// Simulate spin cycle completion
cycle_complete = 1; #10 cycle_complete = 0;
// Simulate draining water
cycle_complete = 1; #10 cycle_complete = 0;
// Machine reaches end state
#20;
// Trigger error: Open door during operation
door_closed = 0; #10;
door_closed = 1; start = 0; #10;
$finish;
end
endmodule
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